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Large Scale Integr (VLSI) Syst 6:707–718. https://doi.org/10.1109/92.736144Xilinx Vivado (2017) Vivado design suite user guide: hierarchical design. https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_3/ug893-vivado-ide.pdf. Accessed 1 Oct 2019Download references AcknowledgementsThe technical resources and facilities of SMDP-C2SD Project of DeitY, Ministry of Electronics and Information Technology, GoI, New Delhi, India, awarded to NIT Hamirpur (HP) are duly acknowledged. Author informationAuthors and AffiliationsDepartment of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Hamirpur, Himachal Pradesh, 177005, IndiaDilip Singh & Rajeevan ChandelAuthorsDilip SinghYou can also search for this author in PubMed Google ScholarRajeevan ChandelYou can also search for this author in PubMed Google ScholarCorresponding authorCorrespondence to Dilip Singh . Editor informationEditors and AffiliationsDepartment of Electronics and Communication Engineering, National Institute of Technology Hamirpur (HP), Hamirpur, Himachal Pradesh, IndiaRohit Dhiman Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur (HP), Hamirpur, Himachal Pradesh, IndiaRajeevan Chandel Rights and permissions Copyright information© 2020 Springer Nature Singapore Pte Ltd. About this chapterCite this chapterSingh, D., Chandel, R. (2020). Register-Transfer-Level Design for Application-Specific Integrated Circuits. In: Dhiman, R., Chandel, R. (eds) Nanoscale VLSI. Energy Systems in Electrical Engineering. Springer, Singapore. https://doi.org/10.1007/978-981-15-7937-0_15Download citation.RIS.ENW.BIBDOI: https://doi.org/10.1007/978-981-15-7937-0_15Published: 04 October 2020 Publisher Name: Springer, Singapore Print ISBN: 978-981-15-7936-3 Online ISBN: 978-981-15-7937-0eBook Packages: EngineeringEngineering (R0) Publish with us
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